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CPU (Centrol Processing Unit)

• ALU Arithmetic Logic Unit: Performs arithmetic and logical operations (e.g., addition, subtraction, comparisons)
• PC Program Counter: Keeps track of the address of the next instruction to be executed.
• IR or CIR Instruction Register: Holds the current instruction being executed.
• MAR Memory Address Register: Stores the address of the memory location being accessed.
• MBR Memory Buffer Register: a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory
• MDR Memory Data Register: Temporarily holds data being transferred to or from memory.
• CU Control Unit: Coordinates the activities of the CPU, managing the flow of data and instructions.
• ACC Accumulator: A register that stores intermediate results of arithmetic and logic operations.
• General Purpose Registers: Used for temporary storage of data during processing.
• FPU Floating Point Unit
• decoder unit: implements the instruction set either in hardwired form or as a micro program.

ARM - Cortex M Core registers

Register data constantly changes, data is loaded in from memroy, results are stored back to memory

Application Binary Interface(ABI) provides architecture details to Compiler/Software Programmer

• R0-R12 General Purpose
• R13-R15 Special Role (lr, sp, pc)
• Program Status Registers
• Exception Mask Registers
• Control Register
• Peripherals, Code, and Data are all represented by 1 address space

Register Definition Files

Platform File that provides interface to peripheral memory by specifying

• Address List for Peripherals
• Access Methods
• Defines for Bit Fields and Bit Masks

Peripheral Access Methods used to read/write data

• Preprocessor Macros
• Direct Dereferencing of Memory
• Structure Overlays

Flash, SRAM, Peripherals, GPIO are platform dependent, details on platform specific registers can be put in C-Programming source files(Register Definition Files)

Compilation tracks and maps memory needs program code and data into segments, which are specified in the Linker file

Use Pointers(address) !!!

System Memories

Memory-mapped I/O is a technique where peripheral registers are mapped to specific memory addresses in the microcontroller’s address space. By reading from and writing to these memory addresses, developers can access and control peripheral functionality directly. memory-mapped peripheral registers in embedded systems are special registers that map physical addresses to control peripheral devices

In embedded systems programming, the memory address of a peripheral register is typically calculated by adding the register’s offset (specified in the device datasheet or reference manual) to the base address of the peripheral. This allows direct access to the register’s memory location

Memory Map provides a memory address to physical device mapping within an address space for use in programming

Linker file maps physical memory regions to compiled memory sections, the compiled memory sections of a compiled executable will be relocated by referencing a symbol name. linker file provides physical address to symbol mapping

• Code Memory (Flash)
• Data Memory (SRAM - storing data and variables during program execution)
• System Memory (typically contains the startup code, interrupt vector table, and bootloader)
• Register Memory (internal to chip)
• External Memory (if applicable)
• Peripheral Memory (contains memory-mapped registers for controlling and communicating with various peripherals (e.g., GPIO, UART, SPI))

Memory Hierarchy

*       Registers
**      Cache(L1/L2/L3)
***     RAM(SRAM/DRAM)
****    Flash/EEPROM
*****   HDD(Hard Drives)
******  Tape

Top 4 layer are used in Embedded systems,
layers towards top are expensive, fast(low latency), small capacity,
towards bottom  are cheap, slow(high latency), large capacity
Typically FLASH stores program's code instruction
RAM stores program's data

Memory Segments

Data Segments

• The data segment is a container for the various types of allocated data that get mapped into physical memory
• Four main Sub-segments: Stack, Heap, Data, BSS(Block started by Symbol). each varies with size depending on the program
• Stack: Temporary Data Storage like local variables
• Heap: Dynamic data storage
• Data: Non-zero initialized global and static data
• BSS: Zero initialized and uninitialized global and static data

Data Allocation

• Variable Types: char, int, float, derived types, enumerated types, _Bool, _Complex(c99)
• Type Qualifiers: const - allocates the data as a constant, will be mapped to Read-Only Memory
• Type Modifiers: unsigned, signed, short, long
• Storage Classes: auto - automatically allocated and deallocated data on the stack, has a lifetime of a function or block, static - data will persist in memory unitl the end of the program, even for local scope variables, extern - declares a global reference defined in another file to be visible by current file, register - allocates data directly in the CPU

int A_BSS:
int B_BSS = 0;
int C_DATA = 1;
const int D_RODATA = 1;

void foo(int E_STACK_REG) {
    int F_STACK_REG;
    int G_STACK_REG = 1;
    static int H_BSS;
    static int I_BSS = 0;
    static int J_DATA = 1;
    char * ptr_STACK_REG;
    ptr_STACK_REG = (char *) malloc(8);
    /* more code */
    free((void *)ptr_STACK_REG);
    return;
}

Memory organization

• Flash and SRAM memory requires a controller to manage interface to CPU
• Internal Bus also has a controller
• Additional external memory can be connected through a I/O pins if more memory (EEPROM) is needed

Volatile Memories	Non-Volatile Memories
SRAM	ROM/PROM/EPROM/EEPROM
DRAM	FLASH
SDRAM	DISK
Register(most)	Tape

• ROM: Read-Only Memory & PROM are programmable once, no ability to write without extra permissions or process
• EPROM: Erasable(UV exposure) and Programmable Multiple times
• EEPROM: Electically Erasable and Programmable Many times
• RAM: Random Access Memory, Allows for access to any part of memory give the address of that location

Interface methods for hardware

• Register Definition Files
• Macro Functions
• Specialized C-Functions

Embedded system architecture

Technical Reference Material

• Datasheet
• Technical Reference manual
• User Guide
• Errata
• Debuggers Users Guide
• Code Composer User Guide

Sensors Introduction

Platforms

• AT89C52RC
• ESP32-DevkitC
• ARDUINO UNO R3
• iTop 4412
• Jetson Nano